Signal Integrity Essentials for Next Generation Systems

Day 1:

• Introduction: why SI engineers also need to know the basics of PI and EMC. Illustrations of how these disciplines can interact in unexpected ways in our modern electronic designs.
• Impedance, reflections, matching: after a brief summary of reflections, transmissions and S parameters, we discuss how much reflection is too much for the different applications and look at the effects of anisotropy, as well as some of the untold perils of periodicity created by glass weave, BGA and connector perforations and backplane slots. Various manifestations and impact of quarter-wave and half-wave resonances.
• PCB and cable constructions: what we don’t know about the materials and manufacturing processes can hurt our design. Stackup nuances that matter for signal integrity: which layer is core vs. prepeg matters a lot under some circumstances. Why knowing the laminate parameters alone is not enough to determine losses; how the manufacturing processes influence the resulting behaviour. In-pair skew in differential interconnects.   
• Discontinuities: how different types of vias influence signal integrity: blind vias, skip vias, buried vias, HDI and UHDI construction. When and why do you need to worry about bends; the full picture. How to optimise via transitions and when this matters.

Day 2:

• Everything you need to know about losses: absorption, reflection, radiation. Dielectric vs. conductor losses. Effect of surface roughness, glass weave, etch variation. Effect of temperature and humidity on conductive and dielectric losses. How causality connects losses to capacitance and inductance variations.
• Crosstalk: The hidden far-end crosstalk in striplines. Ways to reduce far end crosstalk in microstrip with tabbed traces. How a very important power distribution measurement principle applies to crosstalk measurements as well and what happens if we ignore it.
• Differential signalling: comparing the performance of loosely and tightly coupled traces.
• Potential problems and solutions for delay-meander traces. Impact of reflections on skew. When, why and how skew can hurt your system design.
• System SI and material properties and process details: sources of anisotropy in laminates, impact of surface finish on signal integrity.

Day 3:

• SI measurements: we need to know where the calibration's reference plane of a vector-network analyser setup is. Comparison of major calibration options, how to choose among them. When to use TRL or SOLR calibrations, nuances of fixture removal. Which view is better for SI: frequency-domain VNA results or time-domain TDR data.  How to spot non-causality issues in simulated or measured data.
• Comparing pros and cons, reviewing cabling and SI probing options. Testing for environmental effects: impact of temperature and humidity.
• Important rules to keep in mind for simulations. Simple and tricky pitfalls to avoid in selecting, creating and validating models. Which type of solver is best for a particular application? The challenges of and helpful suggestions for correlations related to port type, model size, meshing, sweep and convergence settings. Modelling temperature effects, roughness, dielectric loss. Mixed dielectrics, reliability and life expectancy of components. Explaining and analysing nuances of laminate material and component data sheets to which we must pay attention.

Attending Your Course 

Further details will be emailed to you two weeks ahead of your course, which will include registration information. 

Please get in touch if you have not received this information within five working days of the course start date.  

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